Simon Pontié

CurriculumVitae

Contacts

: École des Mines de Saint-Étienne; Campus Georges Charpak Provence

: 880, route de Mimet; 13541 GARDANNE Cedex France

: +33442616728

: simon.pontie@cea.fr

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CVs:

Work Experiences

Current: Researcher at CEA LETI,; SAS research group (Secure Architectures and Systems), Center of Microelectronics in Provence
2013-2016: Ph.D., Grenoble-Alpes University (France), TIMA Laboratory, AMfoRS research group; Ph.D. thesis defence at Grenoble: November 21^st, 2016. Jury: Arnaud Tisserand, Lionel Torres,; Philippe Elbaz-Vincent, Pierre-Yvan Liardet, Viktor Fischer, Régis Leveugle, and Paolo Maistri; 3 years of research, supervisors: Régis Leuveugle and Paolo Maïstri; Hardware security for cryptography based on elliptic curves (link); 3 years as a teacher at Phelma (school of Physics and Electronics in Grenoble) in addition to my PhD studies; digital and analog electronics, real-time systems, security of embedded systems, embedded systems
February-June 2012: Electronic sciences research during Master internship: TIMA Laboratory, Grenoble; Design and validation of a secure crypto-processor for cryptography based on elliptic curves
June-July 2010: Electronic sciences research during Bachelor internship: BIOMIS Laboratory, Rennes, France; Design of a potentiostat for micro sensor

Education

PhD thesis - Simon Pontié - Hardware security for cryptography based on elliptic curves

2013-2016: Ph.D., Grenoble-Alpes University, TIMA Laboratory, Grenoble, France; Three years, researcher and teacher as Ph.D. student
2012-2013: Research Master: Joseph Fourier University, Grenoble; Nanoelectronic and Nanotechnology, Hardware design
June 2012: National Competitive Examination for Teacher Training in Electrical Engineering (French agrégation)
2011-2012: Master: École Normale Supérieure de Cachan, Rennes; Higher-education teacher training in electrical engineering; Preparation of the French agrégation in electrical engineering
2010-2011: First year of Master: École Normale Supérieure de Cachan and University of Rennes; Electronics and Telecommunications; First year of Master: École Normale Supérieure de Cachan and University of Rennes; Mechanical engineering
2009-2010: Bachelor: École Normale Supérieure de Cachan and University of Rennes; Electronics and Telecommunications; Bachelor: École Normale Supérieure de Cachan and University of Rennes; Mechanical engineering

Publications, Conferences and Research Projects

Journal

[1] S. Pontie, P. Maistri, and R. Leveugle, “Dummy operations in scalar multiplication over elliptic curves: A tradeoff between security and performance,” Microprocessors and Microsystems, vols. 47, Part A, pp. 23–36, 2016. DOI.

Refereed Conference Proceedings

[1] D. Bellizia, N. El Mrabet, A. Fournaris, S. Pontie, R. Francesco, F.-X. Standaert, E. Tasso, and E. Valea, “Post-quantum cryptography: Challenges and opportunities for robust and secure hw design,” in 2021 ieee international symposium on defect and fault tolerance in vlsi and nanotechnology systems (dft), 2021. link.

[2] E. Tasso, L. De Feo, N. El Mrabet, and S. Pontie, “Resistance of isogeny-based cryptographic implementations to a fault attack,” in International workshop on constructive side-channel analysis and secure design, 2021. HAL ePrint link.

[3] C. Gaine, D. Aboulkassimi, S. Pontie, J.-P. Nikolovski, and J.-M. Dutertre, “Electromagnetic fault injection as a new forensic approach for socs,” in 2020 ieee international workshop on information forensics and security (wifs), 2020. HAL DOI.

[4] P. Leignac, O. Potin, J.-M. Dutertre, J.-B. Rigaud, and S. Pontie, “Comparaison of side-channel leakage on rich and trusted execution environments,” in 6th workshop on cryptography and security in computing systems, 2019. HAL DOI.

[5] S. Pontie, A. Bourge, A. Prost-Boucle, P. Maistri, O. Muller, R. Leveugle, and F. Rousseau, “HLS-based methodology for fast iterative development applied to elliptic curve arithmetic,” in 19th euromicro conference on digital system design (dsd), 2016, pp. 511–518. HAL DOI.

[6] T. Backenstrass, M. Blot, S. Pontie, and R. Leveugle, “Protection of ecc computations against side-channel attacks for lightweight implementations,” in 1st international verification and security workshop (ivsw), 2016, pp. 1–6. DOI.

[7] S. Pontie, P. Maistri, and R. Leveugle, “An elliptic curve crypto-processor secured by randomized windows,” in 17th euromicro conference on digital system design (dsd), 2014, pp. 535–542. DOI.

[8] S. Pontie and P. Maistri, “Randomized windows for secure scalar multiplication on elliptic curves,” in 25th international conference on application-specific systems, architectures, and processors (asap), 2014, pp. 78–79. DOI.

[9] S. Pontie and P. Maistri, “Design of a secure architecture for scalar multiplication on elliptic curves,” in 10th conference on ph. D. Research in microelectronics and electronics (prime), 2014, pp. 1–4. DOI.

Other Communications

[1] E. Tasso, L. De Feo, N. El Mrabet, and S. Pontie, “Resistance of isogeny-based cryptographic implementations to a fault attack.” 3th NIST PQC Standardization Conference, 2021. Slides Paper.

[2] S. Pontie and D. Aboulkassimi, “Attaque side-channel sur plateforme mobile android.” Séminaire à l’École des Mines de Saint-Etienne, Gardanne, 2018. link.

[3] S. Pontie and D. Aboulkassimi, “Hardware characterization for mobile devices a security perspective.” 1st Mobitrust International Workshop, Portugal, Aveiro, 2017. link.

[4] S. Pontie, “Étude de la sécurité des courbes quartiques de jacobi vis à vis des attaques par analyse de puissance consommée.” Séminaire à l’École des Mines de Saint-Etienne, Gardanne, 2016. link.

[5] S. Pontie, “Prise en compte des fuites d’informations par canaux auxiliaires dans une implémentation ecc.” Séminaire sécurité des systèmes électroniques embarqués, Rennes, 2016. link.

[6] S. Pontie, “Attaque par analyse de la puissance consommée contre un crypto-processeur basé sur les courbes jacobi quartiques.” Journées Codage et Cryptographie, Toulon, 2015. link.

[7] S. Pontie, P. Maistri, and R. Leveugle, “Tuning of randomized windows against simple power analysis for scalar multiplication on elliptic curves.” TRUDEVICE 2015: Workshop on Trustworthy Manufacturing; Utilization of Secure Devices, Grenoble, 2015. link.

[8] S. Pontie and M.-A. Cornelie, “Fast and secure crypto-processor based on elliptic curve cryptography.” 2eme Journée SCCyPhy: Security; Cryptology for CyberPhysical systems, Grenoble, 2015. link.

[9] S. Pontie, “Architecture d’un crypto processeur ecc sécurisé contre les attaques physiques.” Journées Nationales du Réseau Doctoral en Micro-nanoélectronique, Lille, pp. 1–4, 2014. HAL.

[10] S. Pontie, “Multiplication scalaire avec fenêtrage aléatoire pour la protection d’un coprocesseur de chiffrement basé sur les courbes elliptiques.” 1er Journée SCCyPhy: Security; Cryptology for CyberPhysical systems, Grenoble, 2014..

Research Activities

Supervisions

PhD

Clément Fanjas (soon): Hardware vulnerability exploitation for FORENSIC’s use-cases on mobile devices.
Co-supervised with Jessy Clédière and Driss Aboulkassimi.
Elise Tasso (2019-2022): Hardware security for post-quantum cryptography based on elliptic curve isogenies.
Co-supervised with Nadia El Mrabet and Luca De Feo.

Interships

Clement Fanjas (2021): Hardware vulnerability and new methods to resolve synchronization problem.
Co-supervised with Driss Aboulkassimi and Olivier Potin.

Research Projects

ACROQAY: Carnot Explorer project (2020-2022).
EXFILES: H2020 project (2020-2023)
CSAFE+: FUI project (2017-2021)
MobiTrust: CATRENE project (2014-2017)

Other Activities

Technical committee of the PHISIC2019 workshop.